1. Field of Invention
The present invention relates to a lateral double diffused metal oxide semiconductor (LDMOS) device and a manufacturing method thereof; particularly, it relates to such LDMOS device and manufacturing method thereof wherein a conduction resistance is reduced without decreasing a breakdown voltage.
2. Description of Related Art
FIGS. 1A and 1B are schematic diagrams showing a cross-section view and a top view of a prior art lateral double diffused metal oxide semiconductor (LDMOS) device 100 respectively. As shown in FIGS. 1A and 1B, the LDMOS device 100 includes: a drift region 12, an isolation oxide region 13, a first oxide region 14, a body region 16, a gate 17, a source 18, and a drain 19. The drift region 12 is formed on a substrate 11, and has an N-type conductivity. The isolation oxide region 13 is formed by local oxidation of silicon (LOCOS) structure; the isolation oxide region 13 defines an operation region 13a for the LDMOS device 100. The operation region 13a is indicated by a bold dashed frame as shown in FIG. 1B. The gate 17 overlays part of the first oxide region 14. In this prior art, in order to increase the withstand voltage or breakdown voltage of the LDMOS device 100, the thickness of the isolation oxide region 13 and the first oxide region 14 is increased. However, this will increase the conduction resistance of the LDMOS device 100, and therefore decrease the operation speed and the performance of the LDMOS device 100.
In view of the above, to overcome the drawbacks in the prior art, the present invention proposes an LDMOS device and a manufacturing method thereof, which reduces the conduction resistance of the LDMOS device without decreasing its breakdown voltage.